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rev. information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a op777/op727/op747 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: ? analog devices, inc., features low offset voltage: 100 v max low input bias current: 10 na max single-supply operation: v to 30 v dual-supply operation: v to 15 v low supply current: 300 a/amp max unity gain stable no phase reversal applications current sensing (shunt) line or battery-powered instrumentation remote sensors precision filters op727 soic pin-compatible with lt1013 general description the op777 , op727 , and op747 are precision single , dual, and quad rail-to-rail output single- supply amplifiers featuring micropower operation and rail-to-rail output ranges. these amplifier s provide improved performance over the industry -standard op07 with 15 v supplies , and offer the further advantage of true single -supply operation down to v , and smaller package options than any other high-voltage precision bipolar amplifier. outputs are stable with capacitive loads of over 500 pf. supply current is less than 300 a per amplifier at 5 v. 500 series resis- tors protect the inputs, allow ing input signal levels several volts above the positive supply with out phase reversal. applications for these amplifiers include both line-powered and portable instrumentation, remote sensor signal conditioning, and precision filters. the op777, op727, and op747 are specified over the extended industrial (C40 c to +85 c) temperature range. the op777, single, is available in 8-lead msop and 8-lead soic packages. the op747, quad, is available in 14-lead tssop and narrow 14-lead so packages. surface-mount devices in tssop and msop pack ages are available in tape and reel only. the op727, dual, is available in 8-lead tssop and 8-lead soic packages. the op727 8-lead soic pin configuration differs from the standard 8-lead operational amplifier pinout. functional block diagrams 8-lead msop (rm-8) in in v v+ out nc nc 1 45 8 op777 nc nc = no connect 8-lead soic (r-8) 1 2 3 4 8 7 6 5 in v +in v+ out nc nc nc nc = no connect op777 8-lead tssop (ru-8) top view (not to scale) 8 7 6 5 1 2 3 4 out a Cin a in a vC v out b Cin b in b op727 14-lead soic (r-14) top view (not to scale) 14 13 12 11 10 9 8 1 2 3 4 5 6 7 Cin a in a v in b Cin b out b out d Cin d in d vC in c Cin c out c out a op747 14-lead tssop (ru-14) top view (not to scale) 14 13 12 11 10 9 8 1 2 3 4 5 6 7 Cin a in a v in b Cin b out b out d Cin d in d vC in c Cin c out c out a op747 precision micropower single-supply operational amplifiers 8-lead soic (r-8) top view (not to scale) 8 7 6 5 1 2 3 4 Cin b in a vC v out b Cin a op727 in b out a note: this pin configuration differs from the standard 8-lead operational amplifier pinout. d 3.0 3.0 1.5 781/461-3113 similar low power products supply voltage/ supply current 1.8 v/1 a 1.8 v/20 a 1.8 v/25 a 1.8 v/50 a 2.5 v/1 ma 3.0 v/200 a 4 v/215 a single ad8500 ada4051-1 ad8505 ad8603/ad8613 ada4528-1 dual ad8502 ada4051-2 ad8506 ad8607/ad8617 ada4091-2 ad8622 quad ad8504 ad8508 ad8609/ad8619 ada4091-4 ad8624 2011
rev. ?2? op777/op727/op747?specifications electrical characteristics parameter symbol conditions min typ max unit input characteristics offset voltage op777 v os +25 hz hz hz d
rev. ?3? op777/op727/op747 electrical characteristics parameter symbol conditions min typ max unit input characteristics offset voltage op777 v os +25 c < t a < +85 c 30 100 v ?40 c < t a < +85 c 50 200 v offset voltage op727/op747 v os +25 c < t a < +85 c 30 160 v ?40 c < t a < +85 c 50 300 v input bias current i b ?40 c < t a < +85 c510na input offset current i os ?40 c < t a < +85 c 0.1 2 na input voltage range ?15 +14 v common-mode rejection ratio cmrr v cm = ?15 v to +14 v 110 120 db large signal voltage gain a vo r l = 10 k , v o = ?14.5 v to +14.5 v 1,000 2,500 v/mv offset voltage drift op777 v os / t ?40 c < t a < +85 c 0.3 1.3 v/ c offset voltage drift op727/op747 v os / t ?40 c < t a < +85 c 0.4 1.5 v/ c output characteristics output voltage high v oh i l = 1 ma, ?40 c to +85 c +14.9 +14.94 v output voltage low v ol i l = 1 ma, ?40 c to +85 c ?14.94 ?14.9 v output circuit i out 30 ma power supply power supply rejection ratio psrr v s = 1.5 v to 15 v 120 130 db supply current/amplifier op777 i sy v o = 0 v 300 350 a ?40 c < t a < +85 c 350 400 a supply current/amplifier op727/747 v o = 0 v 320 375 a ?40 c < t a < +85 c 375 450 a dynamic performance slew rate sr r l = 2 k 0.2 v/ s gain bandwidth product gbp 0.7 mhz noise performance voltage noise e n p-p 0.1 hz to 10 hz 0.4 v p-p voltage noise density e n f = 1 khz 15 nv/ hz hz hz d
rev. op777/op727/op747 ?4? absolute maximum ratings 1, 2 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 v input voltage . . . . . . . . . . . . . . . . . . . . ?v s ? 5 v to +v s + 5 v differential input voltage . . . . . . . . . . . . . . supply voltage output short-circuit duration to gnd . . . . . . . . . indefinite storage temperature range rm, r, ru packages . . . . . . . . . . . . . . . . ?65 c to +150 c operating temperature range op777/op727/op747 . . . . . . . . . . . . . . . ?40 c to +85 c junction temperature range rm, r, ru packages . . . . . . . . . . . . . . . . ?65 c to +150 c lead temperature range (soldering, 60 sec) . . . . . . . 300 c electrostatic discharge (human body m odel) . . . . 2000 v max package type ja 3 jc unit 8-lead msop (rm) 190 44 c/w 8-lead soic (r) 158 43 c/w 8-lead tssop (ru) 240 43 c/w 14-lead soic (r) 120 36 c/w 14-lead tssop (ru) 180 35 c/w notes 1 absolute maximum ratings apply at 25 c, unless otherwise noted. 2 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 3 ja is specified for worst-case conditions, i.e., ja is specified for device soldered in circuit board for surface-mount packages. caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the op777/op727/op747 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device d
rev. ?5? op777/op727/op747 typical performance characteristics ? offset voltage ? v 220 60 0 100 80 60 40 20 0 20 40 60 80 100 200 80 40 20 160 120 140 100 180 v sy = 15v v cm = 0v t a = 25 c number of amplifiers tpc 1. op777 input offset voltage distribution tcv os ? v/ c quantity ? amplifiers 200 100 0 1.0 0.2 0.4 0.6 0.8 180 140 60 40 v sy = 15v v cm = 0v t a = ?40 c to +85 c 80 160 120 20 0.1 0.3 0.5 0.7 0.9 1.1 1.2 tpc 4. op727/op747 input offset voltage drift (tcv os distribution) offset voltage ? v 300 0 120 80 040 80 400 200 100 600 number of amplifiers 40 120 140 v sy = 5v v cm = 2.5v t a = 25 c 500 tpc 7. op727 input offset voltage distribution offset voltage ? v 220 60 0 100 80 60 40 20 0 20 40 60 80 100 200 80 40 20 160 120 140 100 180 v sy = 5v v cm = 2.5v t a = 25 c number of amplifiers tpc 2. op777 input offset voltage distribution v quantity ? amplifiers 600 400 0 300 200 v sy = 15v v cm = 0v t a = 25 c 500 100 ?120 ?80 ?40 0 40 80 120 tpc 5. op747 input offset voltage distribution 120 140 offset voltage ? v 300 0 80 040 80 40 120 400 200 100 500 600 v sy = 15v v cm = 0v t a = 25 c number of amplifiers tpc 8. op727 input offset voltage distribution input offset drift ? v/ c number of amplifiers 30 15 0 0 1.2 0.2 0.4 0.6 0.8 1.0 25 20 10 5 v sy = 15v v cm = 0v t a = 40 c to +85 c tpc 3. op777 input offset voltage drift distribution offset voltage ? v number of amplifiers 600 300 0 500 400 200 100 v sy = 5v v cm = 2.5v t a = 25 c ?120 ?80 ?40 0 40 80 120 tpc 6. op747 input offset voltage distribution input bias current ? na number of amplifiers 30 15 0 3 8 4 5 6 7 25 20 10 5 v sy = 15v v cm = 0v t a = 25 c tpc 9. input bias current distribu tion d
rev. op777/op727/op747 ?6? load current ? ma output voltage ? mv 10k 100 0 0.001 0.01 100 0.1 1 10 1.0 v s = 15v t a = 25 c 0.1 10 1k sink source tpc 10. output voltage to supply rail vs. load current temperature ? c supply current ? a 500 500 60 40 140 20 0 20 40 60 80 100 120 200 100 200 400 100 300 i sy+ (v sy = 15v) i sy+ (v sy = 5v) 0 400 i sy (v sy = 5v) i sy (v sy = 15v) 300 tpc 13. supply current vs. temperature frequency ? hz 100 100k 100m 1k 10k 1m 10m v sy = 5v c load = 0 r load = phase shift ? degrees 45 90 135 180 225 270 0 open-loop gain ? db 120 100 80 40 20 0 ?20 ?40 ?60 140 60 tpc 16. open loop gain and phase shift vs. frequency load current ? ma output voltage ? mv 10k 100 0 0.001 0.01 100 0.1 1 10 1.0 source v s = 5v t a = 25 c 0.1 10 1k sink tpc 11. output voltage to supply rail vs. load current supply voltage ? v supply current ? a 350 0 0 535 10 15 20 25 30 300 200 150 100 50 250 t a = 25 c tpc 14. supply current vs. supply voltage closed-loop gain ? db 60 50 40 40 30 20 10 0 10 20 30 frequency ? hz 1k 10k 100m 100k 1m 10m v sy = 15v c load = 0 r load = 2k a v = 100 a v = 10 a v = +1 tpc 17. closed loop gain vs. frequency temperature ? c input bias current ? na 6 4 0 60 40 140 20 0 20 40 60 80 100 120 5 1 3 2 v sy = 15v tpc 12. input bias current vs. temperature frequency ? hz open-loop gain ? db 120 100 80 40 20 0 ?20 ?40 ?60 140 60 10 100k 100m 100 1k 10k 1m 10m phase shift ? de g rees 45 90 135 180 225 270 0 v sy = 15v c load = 0 r load = tpc 15. open loop gain and phase shift vs. frequency frequency ? hz 1k 10k 100m 100k 1m 10m v sy = 5v c load = 0 r load = 2k a v = 100 a v = 10 a v = +1 closed-loop gain ? db 60 50 40 40 30 20 10 0 10 20 30 tpc 18. closed loop gain vs. frequency d
rev. ?7? op777/op727/op747 frequency ? hz output impedance ? 300 270 0 240 210 180 150 120 90 60 30 100 100k 100m 1k 10k 1m 10m v sy = 5v a v = 1 a v = 10 a v = 100 tpc 19. output impedance vs. frequency time ? 100 s/div voltage ? 1v/div v sy = 15v r l = 2k c l = 300pf a v = 1 0v tpc 22. large signal transient response capacitance ? pf small signal overshoot ? % 40 35 0 110 1k 100 30 25 5 20 15 10 v sy = 2.5v r l = 2k v in = 100mv os os tpc 25. small signal overshoot vs. load capacitance frequency ? hz 100 100k 100m 1k 10k 1m 10m v sy = 15v a v = 1 a v = 10 a v = 100 output impedance ? 300 270 0 240 210 180 150 120 90 60 30 tpc 20. output impedance vs. frequency time ? 10 s/div voltage ? 50mv/div v sy = 2.5v c l = 300pf r l = 2k v in = 100mv a v = 1 tpc 23. small signal transient response capacitance ? pf small signal overshoot ? % 35 0 1 10 10k 100 30 25 5 20 15 10 v sy = 15v r l = 2k v in = 100mv 1k +os os tpc 26. small signal overshoot vs. load capacitance time ? 100 s/div voltage ? 1v/div v sy = 2.5v r l = 2k c l = 300pf a v = 1 0v tpc 21. large signal transient response time ? 10 s/div voltage ? 50mv/div v sy = 15v c l = 300pf r l = 2k v in = 100mv a v = 1 tpc 24. small signal transient response time ? 40 s/div input output v sy = 15v r l = 10k a v = 100 v in = 200mv +200mv 0v 0v 10v tpc 27. negative overvoltage recovery d
rev. op777/op727/op747 ?8? time ? 40 s/div input output v sy = 15v r l = 10k a v = 100 v in = 200mv 200mv 0v 0v 10v tpc 28. positive overvoltage recovery time ? 400 s/div voltage ? 5v/div input output v s = 15v a v = 1 tpc 31. no phase reversal frequency ? hz psrr ? db 0 10 10k 10m 140 120 100 80 60 40 20 100 1k 100k 1m +psrr psrr v sy = 2.5v tpc 34. psrr vs. frequency time ? 40 s/div input output 200mv 0v v sy = 2.5v r l = 10k a v = 100 v in = 200mv 2v 0v tpc 29. negative overvoltage recovery fre q uency ? hz cmrr ? db 0 10 10k 10m 140 120 100 80 60 40 20 100 1k 100k 1m v sy = 2.5v tpc 32. cmrr vs. frequency frequency ? hz psrr ? db 0 10 10k 10m 140 120 100 80 60 40 20 100 1k 100k 1m v sy = 15v +psrr psrr tpc 35. psrr vs. frequency time ? 40 s/div input output 0v 0v 2v v sy = 2.5v r l = 10k a v = 100 v in = 200mv 200mv tpc 30. positive overvoltage recovery frequency ? hz cmrr ? db 0 10 10k 10m 140 120 100 80 60 40 20 100 1k 100k 1m v sy = 15v tpc 33. cmrr vs. frequency time ? 1s/div voltage ? 1v/div v sy = 5v gain = 10m tpc 36. 0.1 hz to 10 hz input voltage noise d
rev. ?9? op777/op727/op747 time ? 1s/div v sy = 15v gain = 10m voltage ? 1v/div tpc 37. 0.1 hz to 10 hz input voltage noise v sy = 15v voltage noise density ? nv/ hz frequency ? hz 0 0 2.5k 500 1k 1.5k 2.0k 5 10 15 20 25 30 35 40 tpc 40. voltage noise density temperature ? c short circuit current ? ma 50 50 60 40 140 20 0 20 40 60 80 100 120 40 30 10 40 20 v sy = 15v 20 10 0 30 i sc i sc+ tpc 43. short circuit current vs. temperature voltage noise density ? nv/ hz frequency ? hz 10 0 500 100 200 300 400 20 30 40 50 60 70 80 90 v sy = 15v tpc 38. voltage noise density v sy = 2.5v voltage noise density ? nv/ hz frequency ? hz 0 0 2.5k 500 1k 1.5k 2.0k 5 10 15 20 25 30 35 40 tpc 41. voltage noise density temperature ? c output voltage high ? v 4.95 4.92 4.89 60 40 140 20 0 20 40 60 80 100 120 4.94 4.93 4.91 4.90 v sy = 5v i l = 1ma tpc 44. output voltage high vs. temperature v sy = 2.5v voltage noise density ? nv/ hz frequency ? hz 10 0 500 100 200 300 400 20 30 40 50 60 70 80 90 tpc 39. voltage noise density temperature ? c short circuit current ? ma 50 50 60 40 140 20 0 20 40 60 80 100 120 40 30 10 40 20 v sy = 5v 20 10 0 30 i sc i sc+ tpc 42. short circuit current vs. temperature temperature ? c output voltage low ? mv 70 60 40 140 20 0 20 40 60 80 100 120 80 90 100 110 120 130 140 150 160 v sy = 5v i l = 1ma tpc 45. output voltage low vs. temperature d
rev. op777/op727/op747 ?10? temperature ? c output voltage high ? v 14.944 60 40 140 20 0 20 40 60 80 100 120 14.946 14.948 14.950 14.954 14.956 14.958 14.960 14.962 14.964 v sy = 15v i l = 1ma 14.952 tpc 46. output voltage high vs. temperature temperature ? c output voltage low ? v 14.960 60 40 140 v sy = 15v i l = 1ma 20 0 20 40 60 80 100 120 14.955 14.950 14.945 14.935 14.930 14.940 tpc 47. output voltage low vs. temperature time ? minutes v os ? v 1.5 0 1.5 0 0.5 5.0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 1.0 0.5 0.5 1.0 v sy = 15v v cm = 0v t a = 25 c tpc 48. warm-up drift basic operation the op777/op727/op747 amplifier uses a precision bipolar pnp input stage coupled with a high-voltage cmos output stage. this enables this amplifier to feature an input voltage range which includes the negative supply voltage (often ground- in single-supply applications) and also swing to within 1 mv of the output rails. additionally, the input voltage range extends to within 1 v of the positive supply rail. the epitaxial pnp input structure provides high breakdown voltage, high gain, and an input bias cur- rent figure comparable to that obtained with a ?darlington? input stage amplifier but without the drawbacks (i.e., severe penalties for input voltage range, offset, drift and noise). the pnp input structure also greatly lowers the noise and reduces the dc input error terms. supply voltage the amplifiers are fully specified with a single 5 v supply and, due to design and process innovations, can also operate with a supply voltage from v up to 30 v. this allows operation from most split supplies used in current industry practice, with the advantage of substantially increased input and output voltage ranges over conventional split-supply amplifiers. the op777/op727/op747 series is specified with (v sy = 5 v, v? = 0 v and v cm = 2.5 v which is most suitable for single-supply application. with psrr of 130 db (0.3 v/v) and cmrr of 110 db (3 v/v) offset is mini- mally affected by power supply or common-mode voltages. dual supply, 15 v operation is also fully specified. input common-mode voltage range the op777/op727/op747 is rated with an input common-mode voltage which extends from the minus supply to within 1 v of the positive supply. however, the amplifier can still operate with input voltages slightly below v ee . in figure 2, op777/op727/op747 is configured as a difference amplifier with a single supply of v and negative dc common-mode voltages applied at the inputs terminals. a 400 mv p-p input is then applied to the noninverting input. it can be seen from the graph below that the output does not show any distortion. micropower operation is maintained by using large input and feedback resistors. figure 1. input and output signals with v cm < 0 v +3v op777/ op727/ op747 100k 100k 100k 100k 0.1v v in = 1khz at 400mv p-p 0.27v figure 2. op777/op727/op747 configured as a differ- ence amplifier operating at v cm < 0 v d 3.0 3.0 time ? 0.2ms/div v in 0v v out voltage ? 100mv/div
rev. op777/op727/op747 ?11? input over voltage protection when the input of an amplifier is more than a diode drop below v ee , or above v cc , large currents will flow from the substrate (v?) or the positive supply (v+), respectively, to the input pins which can destroy the device. in the case of op777/op727/ op747, differential voltages equal to the supply voltage will not cause any problem (see figure 3). op777/op727/op747 has built- in 500 internal current limiting resistors, in series with the inputs, to minimize the chances of damage. it is a good practice to keep the current flowing into the inputs below 5 ma. in this con- text it should also be noted that the high breakdown of the input transistors removes the necessity for clamp diodes between the inputs of the amplifier, a feature that is mandatory on many preci- sion op amps. unfortunately, such clamp diodes greatly interfere with many application circuits such as precision rectifiers and comparators. the op777/op727/op747 series is free from such limitations. 30v v p-p = 32v op777/ op727/ op747 figure 3a. unity gain follower time ? 400 s/div voltage ? 5v/div v sy = 15v v in v out figure 3b. input voltage can exceed the supply voltage without damage phase reversal many amplifiers misbehave when one or both of the inputs are forced beyond the input common-mode voltage range. phase reversal is typified by the transfer function of the amplifier effectively reversing its transfer polarity. in some cases this can cause lockup in servo systems and may cause permanent damage or nonrecoverable parameter shifts to the amplifier. many amplifiers feature compensa- tion circuitry to combat these effects, but some are only effective for the inverting input. addi tionally, many of these schemes only work for a few hundred millivolts or so beyond the supply rails. op777/ op727/op747 has a protection circuit against phase reversal when one or both inputs are forced beyond their input common- mode voltage range. it is not recommended that the parts be continuously driven more than 3 v beyond the rails. time ? 400 s/div voltage ? 5v/div v sy = 15v v in v out figure 4. no phase reversal output stage the cmos output stage has excellent (and fairly symmetric) output drive and with light loads can actually swing to within 1 mv of both supply rails. this is considerably better than similar amplifiers featuring (so-called) rail-to-rail bipolar output stages. op777/ op727/op747 is stable in the voltage follower configuration and responds to signals as low as 1 mv above ground in single supply operation. v to 30v v in = 1mv op777/ op727/ op747 v out = 1mv figure 5. follower circuit time ? 10 s/div voltage ? 25mv/div 1.0mv figure 6. rail-to-rail operation output short circuit the output of the op777/op727/op747 series amplifier is pro tected from damage against accidental shorts to either supply voltage, provided that the maximum die temperature is not exceeded on a long-term basis (see absolute maximum rating section). current of up to 30 ma does not cause any damage. a low-side current monitor in the design of power supply control circuits, a great deal of design effort is focused on ensuring a pass transistor?s long-term reliability over a wide range of load current conditions. as a result, monitoring d 3.0
rev. op777/op727/op747 ?12? and limiting device power dissipation is of prime importance in these designs. figure 7 shows an example of 5 v, single-supply current monitor that can be incorporated into the design of a voltage regulator with foldback current limiting or a high current power supply with crowbar protection. the design capitalizes on the op777?s common-mode range that extends to ground. current is monitored in the power supply return where a 0.1 shunt resistor, r sense , creates a very small voltage drop. the voltage at the inverting terminal becomes equal to the voltage at the noninverting terminal through the feedback of q1, which is a 2n2222 or equiva- lent npn transistor. this makes the voltage drop across r1 equal to the voltage drop across r sense . therefore, the current through q1 becomes directly proportional to the current through r sense , and the output voltage is given by: vv r r ri out sense l t r i l v out v out v a v r o v r v out return to roun r sense a ls l t ooo vv v l sat s i o v s r r r a a o ra v to v r i o r loa v l r r ra r ss s a o rr rr t rr rr r rr r i rr rr t rr i rr t rr r t o v to v r o v o v to v r o r r v v v o v v v v v v v v out v use ate resistors s s i a d 3.0 3.0 3.0
op777/op727/op747 e d outline dimensions omplint to ede stndds mo7 4 4 s 4 2 m 2 2 oplnit 2 2 2 4 4 pin identiie m 7 72 figure 12. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters controllin dimnsions r in millimtrs inc dimnsions (in prntss) r roundd-off millimtr uilnts for rfrnc onl nd r not pproprit for us in dsin. complint to dc stndrds ms-12- 124- .25 (.8) .1 (.6) 1.2 (.5) .4 (.15) .5 (.16) .25 (.) 45 8 1.5 (.688) 1.35 (.532) stin pln .25 (.8) .1 (.4) 4 1 85 5. (.168) 4.8 (.18) 4. (.154) 3.8 (.14) 1.2 (.5) bsc 6.2 (.2441) 5.8 (.2284) .51 (.21) .31 (.122) coplnrit .1 figure 13. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches)
op777/op727/op747 4 e d 4 pin s setin plne 2 m 2 4 s 4 44 4 2 oplnit 7 4 omplint to ede stndds mo figure 14. 8-lead thin shrink small outline package [tssop] (ru-8) dimensions shown in millimeters controllin dimnsions r in millimtrs inc dimnsions (in prntss) r roundd-off millimtr uilnts for rfrnc onl nd r not pproprit for us in dsin. complint to dc stndrds ms-12-b 666- 14 8 1 6.2 (.2441) 5.8 (.2283) 4. (.155) 3.8 (.146) 8.5 (.3445) 8.55 (.3366) 1.2 (.5) bsc stin pln .25 (.8) .1 (.3) .51 (.21) .31 (.122) 1.5 (.68) 1.35 (.531) .5 (.1) .25 (.8) 1.2 (.5) .4 (.15) .25 (.8) .1 (.6) coplnrit .1 8 45 figure 15. 14-lead standard small outline package [soic_n] narrow body (r-14) dimensions shown in millimeters and (inches)
op777/op727/op747 e d omplint to ede stndds mo 4 44 4 4 7 4 s pin 4 s 2 m 2 7 4 oplnit setin plne figure 16. 14-lead thin shrink small outline package [tssop] (ru-14) dimensions shown in millimeters rdr d oe 1 eete re e deto e to b r 0c to c e c r rr 0c to c e c r rr 0c to c e c r r 0c to c e r rr 0c to c e r r 0c to c e c r rr 0c to c e c r rr 0c to c e c r r 0c to c 1e r1 rr 0c to c 1e r1 r 0c to c 1e r1 rr 0c to c 1e r1 r 0c to c 1e c r1 rr 0c to c 1e c r1 rr 0c to c 1e c r1 r 0c to c e r 1 rr 0c to c e r 1 r 0c to c e c r rr 0c to c e c r rr 0c to c e c r 1 ro cot t.
op777/op727/op747 e d eision isto 10/11rev. c to rev. d ce e eto o . to 0 to .0 to 0 ...................................................................................... 1 ce d eto o 1. to 1 to 1. to 1 ................................................................................. 1 ce to ee deto eto ...................................... 1 e o oe ot e .................................... 1 ce to ote eto t coooe ote re eto e 1 ............................................ 10 ce to e ........................................................................ 11 ce to e 10 e 11 ............................................. 1 te te deo ....................................................... 1 ce to e e .......................................................... 1 9/01rev. b to rev. c to o tet to to eto ....................................... 1 to o e c r e ....................................... 1 to o tet to ee deto ........................................ 1 to o e to e e ........................................ 011 o deve . t eeve. e etee te e te oet o te eetve oe. d001010/11d

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